Hardware implementation of a Montgomery modular multiplier in a systolic array

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Publication year
2003
Author(s)
Ors, S.B.
Batina, L.
Preneel, B.
Vandewalle, J.
Publisher
S.l. : IEEE
ISBN
15302075
In
IPDPS’03 : Proceedings of the International Parallel and Distributed Processing Symposium, pp. 1-8
DOI
Annotation
IFDPS'03 : International Parallel and Distributed Processing Symposium, 22-26 april, 2003
Publication type
Article in monograph or in proceedings
Please use this identifier to cite or link to this item: https://hdl.handle.net/2066/127481   https://hdl.handle.net/2066/127481
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