Modular reduction without precomputational phase

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Publication year
2009
Author(s)
Knezevic, M.
Batina, L.
Verbauwhede, I.
Publisher
[S.l.] : IEEE
ISBN
9781424438273
In
ISCAS 2009 : IEEE International Symposium on Circuits and Systems, 24-27 May, 2009, Taipei, Taiwan, pp. 1389-1392
DOI
Annotation
ISCAS 2009 : IEEE International Symposium on Circuits and Systems, 24-27 May, 2009, Taipei, Taiwan
Publication type
Article in monograph or in proceedings
Please use this identifier to cite or link to this item: https://hdl.handle.net/2066/127408   https://hdl.handle.net/2066/127408
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