Browsing by Author "Schmaltz, Julien"
Now showing items 138 of 38

Inference of packet types in channels of microarchitectural communication networks
Gastel, B.E. van; Verbeek, F.; Schmaltz, J.2014, Article in monograph or in proceedings (Garcia, L. (ed.), 2014 22ND INTERNATIONAL CONFERENCE ON VERY LARGE SCALE INTEGRATION (VLSISOC) : OCTOBER 6TH – 8TH, 2014 PLAYA DEL CARMEN, MEXICO : CONFERENCE PROCEEDINGS, pp. 16) 
Implicit Assumptions in a Model for Separation Kernels
Verbeek, F.; Schmaltz, J.; Tverdyshev, S.; Blasum, H.; Havle, O.2014, Conference lecture 
Scalable liveness verification for communication fabrics
Joosten, S.J.C.; Schmaltz, J.2014, Article in monograph or in proceedings (Preas, K. (ed.), Design, Automation & Test in Europe, Dresden, Germany March 2428, 2014 : proceedings, pp. 16) 
A Decision Procedure for DeadlockFree Routing in Wormhole Networks
Verbeek, F.; Schmaltz, J.2014, Article / Letter to editor (IEEE Transactions on Parallel and Distributed Systems, 25, 8, (2014), pp. 19351944) 
On two models of noninterference: Rushby and Greve, Wilding, and Vanfleet
Ramirez, A.G.; Schmaltz, J.; Verbeek, F.; Langenstein, B.; Blasum, H.2014, Article in monograph or in proceedings (Bondavalli, A. (ed.), Computer Safety, Reliability, and Security 33rd International Conference, SAFECOMP 2014, Florence, Italy, September 1012, 2014. Proceedings, pp. 246261) 
WickedXmas: Designing and Verifying onchip Communication Fabrics
Joosten, S.J.C.; Verbeek, F.; Schmaltz, J.2014, Article in monograph or in proceedings (DIFTS'14 : Proceedings of the 3rd International Workshop on Design and Implementation of Formal Tools and Systems, October 20, 2014 Ecole Polytechnique Fédérale de Lausanne, Lausanne, Switzerland, pp. 18) 
Formal deadlock verification for click circuits
Verbeek, F.; Joosten, S.J.C.; Schmaltz, J.2013, Article in monograph or in proceedings (ASYNC 2013 : IEEE 19th International Symposium on Asynchronous Circuits and Systems : Proceedings, pp. 183190) 
Easy formal specification and validation of unbounded networksonchips architectures
Verbeek, F.; Schmaltz, J.2012, Article / Letter to editor (ACM Transactions on Design Automation of Electronic Systems, 17, 1, (2012), pp. 128, article 1) 
Towards the Formal Verification of Cache Coherency at the Architectural Level
Verbeek, F.; Schmaltz, J.2012, Article / Letter to editor (ACM Transactions on Design Automation of Electronic Systems, 17, 3, (2012), pp. 20) 
Analysis of a clock synchronization protocol for wireless sensor networks
Heidarian, F.; Schmaltz, J.; Vaandrager, F.2012, Article / Letter to editor (Theoretical Computer Science, 413, 1, (2012), pp. 87105) 
Proof Pearl: A Formal Proof of Dally and Seitz' Necessary and Sufficient Condition for DeadlockFree Routing in Interconnection Networks
Verbeek, F.; Schmaltz, J.2012, Article / Letter to editor (Journal of Automated Reasoning, 48, 4, (2012), pp. 419439) 
Preface
Geuvers, H.; Wiedijk, F.; Eekelen, M.C.J.D. van; Schmaltz, J.2011, Part of book or chapter of book (Eekelen, M. Van; Geuvers, H.; Schmaltz, J. (ed.), Interactive Theorem Proving : Second International Conference, ITP 2011, Berg en Dal, The Netherlands, August 2225, 2011, Proceedings, pp. VVI) 
Formal verification of a deadlock detection algorithm
Verbeek, F.; Schmaltz, J.2011, Part of book or chapter of book (Hardin, D. (ed.), Proceedings 10th International Workshop on the ACL2 Theorem Prover and its Applications Austin, Texas, USA, November 34, 2011, pp. 103112) 
A Fast and Verified Algorithm for Proving StoreandForward Networks DeadlockFree
Verbeek, F.; Schmaltz, J.2011, Article in monograph or in proceedings (19th International Euromicro Conference on Parallel, Distributed and NetworkBased Processing PDP 2011 : proceedings, pp. 310) 
A comment on "a necessary and sufficient condition for deadlockfree adaptive routing in wormhole networks"
Verbeek, F.; Schmaltz, J.2011, Article / Letter to editor (IEEE Transactions on Parallel and Distributed Systems, 22, 10, (2011), pp. 17751776) 
Hunting deadlocks efficiently in microarchitectural models of communication fabrics
Verbeek, F.; Schmaltz, J.2011, Article in monograph or in proceedings (Bjesse, P.; Slobodová, A. (ed.), Proceedings of the 11th Conference on Formal Methods in Computer Aided Design (FMCAD 2011), pp. 223231) 
On Necessary and Sufficient Conditions for DeadlockFree Routing in Wormhole Networks
Verbeek, F.; Schmaltz, J.2011, Article / Letter to editor (IEEE Transactions on Parallel and Distributed Systems, 22, 12, (2011), pp. 20222032) 
Automatic verification for deadlock in networksonchips with adaptive routing and wormhole switching
Verbeek, F.; Schmaltz, J.2011, Article in monograph or in proceedings (NOCS 2011: The Fifth ACM/IEEE International Symposium on NetworksonChip, pp. 2532) 
Formal specification of networksonchips: Deadlock and evacuation
Verbeek, F.; Schmaltz, J.2010, Article in monograph or in proceedings (DATE 2010 :Design, Automation and Test in Europe Conference and Exhibition, pp. 17011706) 
Formal Validation and Verification of NetworksonChips: Status and Perspective
Schmaltz, J.; Verbeek, F.; Broek, T. van den2010, Article in monograph or in proceedings (Stoy, J. (ed.), Eighth International Workshop on Designing Correct Circuits : Paphos, Cyprus, 2021 March 2010 : A Satellite Event of the ETAPS 2010 group of conferences, pp. 114) 
The axiomatization of override and update
Berendsen, J.K.; Jansen, D.N.; Schmaltz, J.; Vaandrager, F.W.2010, Article / Letter to editor (Journal of Applied Logic, 8, 1, (2010), pp. 141150) 
A Formal Proof of a Necessary and Sufficient Condition for DeadlockFree Adaptive Networks
Verbeek, F.; Schmaltz, J.2010, Part of book or chapter of book (Kaufmann, M.; Paulson, L. (ed.), Interactive Theorem Proving, pp. 6782) 
Inference and Abstraction of the Biometric Passport
Aarts, Fides; Schmaltz, J.; Vaandrager, F.2010, Part of book or chapter of book (Margaria, T.; Steffen, B. (ed.), Leveraging Applications of Formal Methods, Verification, and Validation : 4th International Symposium on Leveraging Applications, ISoLA 2010, Heraklion, Crete, Greece, October 1821, 2010, Proceedings, pp. 673686) 
A formal approach to the verification of networksonchips
Borrione, Dominique; Helmy, Amr; Pierre, Laurence; Schmaltz, Julien2009, Article / Letter to editor (Eurasip Journal on Embedded Systems, 2009, 1, (2009), pp. 114) 
Analysis of a Clock Synchronization Protocol for Wireless Sensor Networks
Heydarian, Faranak; Schmaltz, Julien; Vaandrager, F.W.2009, Article in monograph or in proceedings (Cavalcanti, Ana; Dams, Dennis (ed.), FM 2009: Formal Methods, Second World Congress, Eindhoven, The Netherlands, November 26, 2009. Proceedings, pp. 516531) 
NetworksonChips: Theory and Practice
Borrione, Dominique; Helmy, Amr; Pierre, Laurence; Schmaltz, Julien2009, Part of book or chapter of book (Gebali, Fayez; Elmilgi, Haytham; ElKharashi, Mohamed Watheq (ed.), Formal Verification of Communications in NetworksonChips) 
A generic implementation model for the formal verification of networksonchips
Broek, Tom van den; Schmaltz, Julien2009, Article in monograph or in proceedings (Ray, Sandip; Russinoff, David (ed.), Proceedings of the Eighth International Workshop on the ACL2 Theorem Prover and its Applications, Boston, May 1112, 2009Massachusetts, pp. 123127) 
ModelBased Testing of Electronic Passports
Mostowski, W.I.; Poll, E.; Schmaltz, J.; Tretmans, J.; Wichers Schreur, R.J.M.2009, Article in monograph or in proceedings (Alpuente, M.; Cook, B.; Joubert, C. (ed.), Formal Methods for Industrial Critical Systems 2009,14th International Workshop, FMICS 2009, Eindhoven, The Netherlands, November 23, 2009, Proceedings, pp. 207209) 
Towards a formally verified networkonchip
Broek, Tom van den; Schmaltz, Julien2009, Article in monograph or in proceedings (Proceedings of 9th International Conference 2009 Formal Methods in ComputerAided Design FMCAD 2009, 1518 November 2009, Austin, Texas, USA, pp. 184187) 
Formal validation of deadlock prevention in networksonchips
Verbeek, F.; Schmaltz, Julien2009, Article in monograph or in proceedings (Ray, Sandip; Russinoff, David (ed.), Proceedings of the Eighth International Workshop on the ACL2 Theorem Prover and its Applications, May 11  12, 2009, pp. 128138) 
On conformance testing for timed systems
Schmaltz, Julien; Tretmans, Jan2008, Article in monograph or in proceedings (Cassez, Franck; Jard, Claude (ed.), Formal Modeling and Analysis of Timed Systems : 6th International Conference, FORMATS 2008, Saint Malo, France, September 1517, 2008. Proceedings, pp. 250264) 
A functional formalization of on chip communications
Schmaltz, J.; Borrione, Dominique2008, Article / Letter to editor (Formal Aspects of Computing, 20, 3, (2008), pp. 241258) 
A Formal Model of Clock Domain Crossing and Automated Verification of TimeTriggered Hardware
Schmaltz, J.2007, Article in monograph or in proceedings (Baumgartner, J.; Sheeran, M. (ed.), Formal Methods in Computer Aided Design, pp. 223230) 
A Generic Model for Formally Verifying NoC Communication Architectures: A Case Study
Borrione, Dominique; Helmy, Amr; Pierre, Laurence; Schmaltz, J.2007, Article in monograph or in proceedings (Friedman, Eby; Wolf, Wayne (ed.), IEEE First International Symposium on NetworksonChips, NOCS 2007, pp. 127136) 
Formal Specification and Validation of Minimal Routing Algorithms for the 2D Mesh
Schmaltz, J.2007, Article in monograph or in proceedings (Gamboa, R.; Sawada, J.; Cowles, J. (ed.), 7th International Workshop on the ACL2 Theorem Prover and its Applications (ACL2'07), pp. 4049)